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jam_sz

Fresh Boarder

2008/10/29 04:34

Flash Memory Protection

Hello,
when I do an read access to flash which are an RE-protected block,and return data filled with all 0s.

"A controller interrupt may be optionally generated to alert software developers of poorly behaving software during the development and debug phases."

I want to know which interrupt and register will be influenced.

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LMI Kyle

Expert Boarder

2008/10/29 11:38

Re:Flash Memory Protection

Hello,

The interrupt will occur on vector 45, the Flash Control vector. The raw interrupt status bit is in the Flash Controller Raw Interrupt Status (FCRIS) register. The interrupt mask control bit is in the Flash Controller Interrupt Mask (FCIM) register. The masked interrupt status bit is in the Flash Controller Masked Interrupts Status and Clear (FCMISC) register.

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