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2700 Series Devices

Featuring an integrated Controller Area Network interface, 128K bytes of single cycle flash, 64K bytes of single cycle SRAM, and 50 MHz performance, the Stellaris LM3S2700 microcontrollers are perfect for cost-effective embedded control applications requiring industrial connectivity. Analog features in the LM3S2700 series include up to 2 analog comparators and up to 6 channels of 10-bit ADC. In addition, the series features up to 8 PWM outputs and a quatrature encoder input for sophisticated motion control.

Summarized Features

CANUARTsGPIOsSSII2CAnalog ComparatorsADC Channels PWM PinsQuadrature Encoder
LM3S279323602231682
LM3S2776110-3311–68–
LM3S27391220-56111461
LM3S27301137-601–2–––


Product Details



Lm3S2793
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LM3S2793

The Stellaris® LM3S2793 microcontroller is based on the ARM® Cortex™-M3 controller core operating at up to 80 MHz, with 128 kB flash, 64 kB SRAM, a 32-ch DMA, a 32-bit external peripheral interface, a 16MHz internal precision oscillator, and ROM preloaded with the StellarisWare Driver Library, Boot Loader, AES encryption lookup tables, and a cyclical redundancy check (CRC) function. The LM3S2793 also features real-time industrial connectivity, with 2 CAN controllers, 2 SSI / SPI controllers, 2 I2C interfaces, an I2S interface, and 3 UARTs. The LM3S2793 microcontroller also features advanced motion control features, including 8 motion-control PWM outputs with dead-band, two quadrature encoder inputs for precise position monitoring, and 4 fault protection inputs for low-latency shutdown. The microcontroller also features intelligent analog capability, including 3 analog comparators and 16 channels of highly accurate 10-bit analog-to-digital conversion - with the ability to sample two channels simultaneously at speeds of 1M samples per second. Finally, the LM3S2793 microcontroller provides 16 digital comparators, a 24-bit systick timer, four 32-bit or eight 16-bit general-purpose timers, 2 watchdog timers, a battery-backed hibernation module with RTC and 256 bytes of non-volatile state-saving memory, a low drop-out voltage regulator so that only one supply voltage is required, brown-out reset, power-on reset controller, and up to 60 GPIOs.

Lm3S2776
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LM3S2776

The Stellaris® LM3S2776 microcontroller is based on the ARM® Cortex™-M3 controller core operating at 50 MHz, with 128 kB single-cycle flash, 64 kB single-cycle SRAM, a 32-ch DMA, a CAN controller, a 24-bit Systick Timer, 3x 32-bit or 6x 16-bit general-purpose timers, a watchdog timer, an SSI / SPI controller, an I2C interface, a UART, a 10-bit analog-to-digital converter (ADC) with 6 input channels (+/- 1 LSb of accuracy), a motion-control Pulse Width Modulation (PWM) module with 8 output channels, a battery-backed hibernation module with RTC and 256 bytes of non-volatile state-saving memory, a low drop-out voltage regulator, brown-out reset, power-on reset controller, and up to 33 GPIOs. Furthermore, the LM3S2776 microcontroller features ROM preloaded with the Stellaris Driver Library and BootLoader.

Lm3S2739
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LM3S2739

The LM3S2739 microcontroller is based on the ARM Cortex-M3 controller core operating at 50 MHz, with 128 kB single-cycle flash, 64 kB single-cycle SRAM, CAN controller, Systick timer, three 32-bit or six 16-bit general purpose timers, watchdog timer, SSI / SPI controller, I2C interface, analog comparator, two UARTs, 10-bit analog-to-digital converter (ADC) with four input channels, six motion-control Pulse Width Modulation (PWM) outputs, Quadrature Encoder Input, battery-backed hibernation module with RTC, low drop-out voltage regulator, brown-out reset, power-on reset controller, and up to 56 GPIOs.

LM3S2730
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LM3S2730

The LM3S2730 microcontroller is based on the ARM Cortex-M3 controller core operating at 50 MHz, with 128 kB single-cycle flash, 64 kB single-cycle SRAM, CAN controller, Systick timer, three 32-bit or six 16-bit general purpose timers, watchdog timer, SSI / SPI controller, two analog comparators, UART, low drop-out voltage regulator, brown-out reset, power-on reset controller, and up to 60 GPIOs.