Product Features

32-Bit RISC Performance

• 32-bit ARM® Cortex™-M3 v7M architecture optimized for small-footprint embedded applications
• Thumb®-compatible Thumb-2-only instruction set
• 50-MHz operation
• Hardware-division and single-cycle-multiplication
• Integrated Nested Vectored Interrupt Controller (NVIC) providing deterministic interrupt handling
• 21 interrupt channels with eight priority levels
• Memory protection unit (MPU) provides a privileged mode for protected operating system functionality
• Unaligned data access, enabling data to be efficiently packed into memory
• Atomic bit manipulation (bit-banding) delivers maximum memory utilization and streamlined peripheral control

• 32-KB single-cycle flash with two forms of flash protection on a 2-KB block basis
• 8-KB single-cycle SRAM

• Three timers, each of which can be configured: as a single 32-bit timer, as a dual 16-bit timer with capture and simple PWM modes
• Real-Time Clock (RTC) capability

• 32-bit down counter with a programmable load register
• Separate watchdog clock with an enable
• Programmable interrupt generation logic with interrupt masking
• Lock register protection from runaway software
• Reset generation logic with an enable/disable

• Programmable interface operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial
• Master or slave operation

• Two fully programmable 16C550-type UARTs
• Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service loading
• Programmable baud-rate generator

• Three independent integrated analog comparators
• Configurable for output to: drive an output pin or generate an interrupt
• Compare external pin input to external pin input or to internal programmable voltage reference

• Master and slave receive and transmit operation with transmission speed up to 100 Kbps in Standard mode and 400 Kbps in Fast mode
• Interrupt generation
• Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing mode

• 7 to 36 GPIOs, depending on user configuration
• 5-V-tolerant input/outputs
• Programmable interrupt generation as either edge-triggered or level-sensitive on all pins
• Programmable drive strength and slew rate control for GPIO pad configuration
• Bit-masking in both read and write operations through the address lines

• On-chip Low Drop-Out (LDO) voltage regulator, with programmable output user-adjustable from 2.25 V to 2.75 V
• Low-power options on processor: Sleep and Deep-sleep modes
• Low-power options for peripherals: software controls shutdown of individual peripherals
• User-enabled LDO unregulated voltage detection and automatic reset
• 3.3-V supply brownout detection and reporting via interrupt or reset

• 48-pin RoHS-compliant LQFP
• Industrial operating temperature